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 IDT74FCT16240AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS 16-BIT BUFFER/LINE DRIVER
IDT74FCT16240AT/CT/ET
FEATURES:
* * * * * * * *
DESCRIPTION:
0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage 1A (max.) VCC = 5V 10% High drive outputs (-32mA IOH, 64mA IOL) Power off disable outputs permit "live insertion" Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25C * Available in SSOP and TSSOP packages
The FCT16240T 16-bit buffer/line driver is built using advanced dual metal CMOS technology. These high-speed, low-power devices offer bus/backplane interface capability with improved packing density. The flow-through organization of signal pins simplifies layout. The three-state controls are designed to operate these devices in a Quad-Nibble, Dual-Byte or single 16-bit word mode. All inputs are designed with hysteresis for improved noise margin. The FCT16240T is ideally suited for driving high capacitance loads and lowimpedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.
FUNCTIONAL BLOCK DIAGRAM
1OE 1A1 1A2 1Y1
3OE 3A1 3A2 3Y1 3Y2
1Y2 1Y3
1A3 1A4
3A3
3Y3 3Y4
1Y4
3A4
2OE 2Y1
4OE 4A1 4A2 4A3
2A1 2A2 2A3
4Y1 4Y2 4Y3
2Y2 2Y3 2Y4
2A4
4A4
4Y4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
(c) 2002 Integrated Device Technology, Inc.
JUNE 2002
DSC-5465/1
IDT74FCT16240AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1OE 1Y1 1Y2
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max -0.5 to 7 -0.5 to VCC+0.5 -65 to +150 -60 to +120 Unit V V C mA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
SSOP/ TSSOP TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
2OE 1A1 1A2
VTERM(2) TSTG IOUT
VTERM(3) Terminal Voltage with Respect to GND
GND
1Y3 1Y4
GND
1A3 1A4
VCC
2Y1 2Y2
VCC
2A1 2A2
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXX Output and I/O terminals 3. Output and I/O terminals for FCT162XXX.
GND
2Y3 2Y4 3Y1 3Y2
GND
2A3 2A4 3A1 3A2
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. 6 8 Unit pF pF
GND
3Y3 3Y4
GND
3A3 3A4
NOTE: 1. This parameter is measured at characterization but not tested.
VCC
4Y1 4Y2
VCC
4A1 4A2
PIN DESCRIPTION
Pin Names xOE xAx xYx Data Inputs 3-State Outputs Description 3-State Output Enable Inputs (Active LOW)
GND
4Y3 4Y4 4OE
GND
4A3 4A4 3OE
FUNCTION TABLE(1)
Inputs xOE L L H
NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-Impedance
Outputs xAx L H X xYx
L
H Z
2
IDT74FCT16240AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40C to +85C, VCC = 5.0V 10%
Symbol VIH VIL IIH Parameter Input HIGH Level Input LOW Level Input HIGH Current (Input pins)(5) Input HIGH Current (I/O pins)(5) IIL Input LOW Current (Input pins)(5) Input LOW Current (I/O pins)(5) IOZH IOZL VIK IOS VH ICCL ICCH ICCZ High Impedance Output Current (3-State Output pins)(5) Clamp Diode Voltage Short Circuit Current Input Hysteresis Quiescent Power Supply Current VCC = Max. VIN = GND or VCC VCC = Min., IIN = -18mA VCC = Max., VO = GND(3) -- VCC = Max. VO = 2.7V VO = 0.5V VI = GND Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = VCC Typ.(2) -- -- -- -- -- -- -- -- -0.7 -140 100 5
Min. 2 -- -- -- -- -- -- -- -- -80 -- --
Max. -- 0.8 1 1 1 1 1 1 -1.2 -250 -- 500
Unit V V A
A
V mA mV A
OUTPUT DRIVE CHARACTERISTICS
Symbol IO VOH Parameter Output DriveCurrent Output HIGH Voltage Test Conditions(1) VCC = Max., VO = 2.5V(3) VCC = Min. VIN = VIH or VIL IOH = -3mA IOH = -15mA IOH VOL IOFF Output LOW Voltage Input/Output Power Off Leakage(5) VCC = Min. VIN = VIH or VIL VCC = 0V, VIN or VO 4.5V -- -- 1 A
NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Duration of the condition can not exceed one second 5. The test limit for this parameter is 5A at TA = -55C.
Min. -50 2.5 2.4 2 --
Typ.(2) -- 3.5 3.5 3 0.2
Max. -180 -- -- -- 0.55
Unit mA
V
= -32mA(4)
IOL = 64mA
V
3
IDT74FCT16240AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open xOE = GND One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fi = 10MHz 50% Duty Cycle xOE = GND One Bit Toggling VCC = Max. Outputs Open fi = 2.5MHz 50% Duty Cycle xOE = GND Sixteen Bits Toggling VIN = VCC VIN = GND Test Conditions(1) Min. -- -- Typ.(2) 0.5 60 Max. 1.5 100 Unit mA A/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND VIN = VCC VIN = GND VIN = 3.4V VIN = GND
--
0.6
1.5
mA
--
0.9
2.3
--
2.4
4.5(5)
--
6.4
16.5(5)
NOTES: 1. For conditions shown as min. or max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16240AT Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(o) Parameter Propagation Delay xAx to xYx Output Enable Time Output Disable Time Output Skew(3) Condition
(1)
FCT16240CT Min. 1.5 1.5 1.5 --
(2)
FCT16240ET Min. 1.5 1.5 1.5 --
(2)
Min. 1.5 1.5 1.5 --
(2)
Max. 4.8 6.2 5.6 0.5
Max. 4.3 5.8 5.2 0.5
Max. 3.2 4.4 3.6 0.5
Unit ns ns ns ns
CL = 50pF RL = 500
NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4
IDT74FCT16240AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS SWITCH POSITION
Test Open Drain Disable Low Enable Low All Other Tests Switch Closed Open
V CC 500 VIN Pulse Generator RT D.U.T. 50pF CL 500 VOUT
7.0V
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC.
tSU
tH
tREM
3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
1.5V
1.5V
tSU
tH
Pulse Width
Set-up, Hold, and Release Times
ENABLE SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED tPZH SWITCH OPEN 3.5V 1.5V tPHZ
DISABLE 3V 1.5V 0V 3.5V 0.3V 0.3V 1.5V 0V VOL VOH 0V
tPLZ
Propagation Delay
Enable and Disable Times
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.
5
IDT74FCT16240AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT XX FCT Temp. Range XXX Family XXXX Device Type XX Package
PV PA
Shrink Small Outline Package Thin Shrink Small Outline Package
240AT 240CT 240ET
16-Bit Buffer/Line Driver
16
Double-Density, 5 Volt, Balanced Drive
74
- 40C to +85C
DATA SHEET DOCUMENT HISTORY 3/28/2002 6/20/2002 Removed standard speed grade Updated as per PDNs Logic-00-07 and Logic-01-04
CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054
for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com 6
for Tech Support: logichelp@idt.com (408) 654-6459


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